An LTspice simulation model of gamma-radiation effects and annealing in a voltage regulator with a lateral serial PNP transistor with round emitters

The aim of this paper was to determine the reasons for a complex radiation response of the commercial-off-the-shelf LM2940CT5 low-dropout voltage regulator. Examination of this circuit in a gamma-radiation environment disqualified its use when operated with relatively high output currents, while its radiation tolerance was satisfactory when load current was approximately one-tenth (or lower) of the nominal value. In order to obtain a more thorough insight into the radiation response of this integrated circuit, a detailed SPICE model was developed. This model enabled mutual comparison of the influence of serial and driver PNP power transistor parameters: forward emitter current gain, knee current and emitter resistance. The serial lateral PNP power transistor with round emitters was identified as the weakest element that crucially affected the entire circuit radiation tolerance. The effects of gamma-radiation were examined for total doses up to 500 Gy followed by three sequences of annealing. Detailed characteristics of Beta(Ic) were procured for four different kinds of bias and load conditions during irradiation. The emitter resistance increase of the serial power transistor was a primary reason for the low radiation tolerance of the entire voltage regulator; it was much more influential than the perceived decline of the PNP power transistor forward emitter current gain.


Introduction
Voltage regulators are widely used for electronic circuit power supply in aerospace, nuclear and military systems [1][2][3][4], where a harsh radiation environment heavily affects the electron devices' reliability [5]. Lowdropout voltage regulators are particularly important in battery-powered systems [6].
Usually, low-dropout voltage regulators are bipolar or BiCMOS circuits, which are based on bipolar transistors as the basic components. A considerable part of the voltage regulator chip is occupied by power transistors [3,4], in both serial and driver element roles. PNP power devices are usually used to achieve a very low dropout voltage on the serial transistor. Due to the large area of these transistors, high perimeter-to-area ratio and thick isolation oxide, in many cases power transistors are considered to be the most vulnerable elements of power integrated circuits to ionising radiation [7]. Vertical power transistors are generally preferred to lateral ones due to their lower vulnerability to radiation effects that affect the oxide above the base area [8]. Nevertheless, in some cases the use of power integrated circuits with lateral PNP transistors cannot be avoided; further, there are specially designed radiation-tolerant analogue integrated circuits based on these power elements [9][10][11].
During the previous years, detailed research was conducted in order to define the topologies of cheap, commercial-off-the-shelf (COTS) low-dropout voltage regulators suitable for implementation in radiation environments instead of specially designed "rad-hard" components [12][13][14][15][16][17]. Among these candidates was a LM2940CT5 voltage regulator, an automotive circuit with lateral PNP power transistors with round emitters. Nevertheless, experimental results clearly indicated that these commercial integrated circuits had low radiation tolerance [12][13][14]16]. In the same period, examinations indicated that the specially designed, rad-hard LM2941W circuits exhibited high radiation tolerance [11]. This circuit is, in its basic topology, very similar to the LM2940CT5 circuit, so it would be justified to expect the COTS voltage regulator to demonstrate much higher radiation tolerance than what was recorded. Thus, an effort was made to examine the reasons for the low LM2940CT5 voltage regulator radiation tolerance, and this effort led to the development of a detailed simulation model of this integrated circuit.

Theory
Ionising radiation primarily affects bipolar transistors by reducing their forward emitter current gain, namely by a base current (I B ) increase. This excess base current (ΔI B : difference between base current, created by the influence of radiation, and its pre-irradiation value, I B0 [7]) is a direct consequence of charge trapping in the isolation oxide above the base area as well as the charge trapped in the interface between the silicon and silicon dioxide. Excess base current may be approximated by the following equation [18,19]: General expression regarding a concentration of the oxide-trapped charge, N ot , is [20]: (2) where: ε Si -permitivity of silicon (1.04·10 -12 F/cm), n S -surface electron concentration in the base area, V tr -emitter -base transition voltage from the ideality factor m < 2 to m = 2. Transition voltage is defined for the surface potential in the base area ψ s , being ψ s = V EB /2.
Using relation (2), a simplified model for a maximum electric field in the space-charge region was developed [18]: Therefore, in model, basically found on equations (1) and (3), excess base current is directly related to the surface recombination velocity and, consequently, to the interface traps concentration [18]: where: σ -carrier capture cross section, v th -carrier thermal velocity.
Nonetheless, limitation of the model described by equation (4) is taking into account only the surface recombination effects, thus neglecting the effects of the oxide trapped charge above the base area, as well as the effects of interface traps on the semiconductor surface potential. In order to take into account also some other effects, improved model for the excess base current was recently introduced [21], emphasizing the effects of interface traps on the N-type base area surface potential, ψ S [21]: where: ΔI R-SCR -surface recombination base current, ΔI R-NBS -neutral-base-surface recombination current, R S -the series resistance between the base and emitter, I E -emitter current, W B -base width.
As may be seen from equation (5), even this sophisticated model primarily takes into account interface traps [21]. Thus, its authors frequently neglected the influence of the oxide-trapped charge on the excess base current, since a positive charge trapped in the oxide layer opposes the electrostatic impact of the interface traps on the surface carriers recombination [21].
The next cause of transistor parameter degradation is charge trapping in oxide and at interfaces above emitter areas, yet the influence of these effects is not as well defined as charge trapping above the base area [19]. In PNP transistors, oxide trapped charge (during the initial period of irradiation) suppresses the negative effects of interface traps, primarily due to the accumulation of Ntype base [9]. On the other hand, oxide trapped charge and interface traps have additive negative effects on the P-type emitter area [8]. Unbiased bipolar PNP transistors are the most sensitive to ionising radiation [8].
Further, high load current, which can significantly increase the chip temperature, leads to the tremendous recovery of the trapped charge and, therefore, may prevent irradiated circuit failure [4]. These effects are even more prominent in lateral PNP transistors, where both base and emitter areas are situated directly below the oxide.
After ionising radiation exposure, post-irradiation effects commence in bipolar transistors and related integrated circuits [22]. At room temperature, trapped charge tunneling is a dominant effect, while at approximately 100°C a more pronounced oxide trapped charge recovery commences [7]. Interface traps are more stable defects, so their annealing happens at 150-250°C and higher temperatures [7]. In some bipolar integrated circuits it is possible to roughly exclude the oxide trapped charge influence, where oxide trap annealing occurs at approximately 100°C. Applying even higher temperatures therefore leads to partial recovery of the interface traps [22]. The bipolar integrated circuit degree of recovery (or further degradation) after irradiation also depends on bias conditions (both during the irradiation and the following annealing), absorbed total dose, dose rate (particularly due to enhanced lowdose-rate sensitivity (ELDRS) effect), a quality of the implemented oxides, technological processes, concentration of impurities, et cetera [7].

Experiment
A COTS LM2940CT5 circuit was used as a representative of a low-dropout voltage regulator with lateral PNP power transistors. This circuit, made by National Semiconductor ® , has two power transistors, comprised of a multitude of parallel connected elementary lateral PNP transistors with round emitters: the serial and driver transistor [23]. The serial transistor is comprised of 350 elementary transistors, while the driver transistor is made by parallel connection of 70 PNP transistors of the same type [23,24]. Each elementary transistor has a structure with a round emitter (13 μm in diameter) and may provide an output current of nearly 3 mA [24].
Voltage regulators were exposed to ionising radiation in the Vinča Institute of Nuclear Sciences, Belgrade, Serbia. Samples were irradiated in the vicinity of a 60 Co gamma-radiation source, at a dose rate of 40 mGy(SiO 2 )/s. After absorption of the predefined total doses, irradiation was temporarily interrupted, and electrical characteristics of samples were examined. Then, irradiation was continued and this procedure was repeated until samples absorbed a total dose of 500 Gy(SiO 2 ). Integrated circuits were irradiated with various bias and load conditions: Following absorption of the specified total dose, irradiated integrated circuits were kept in an office locker at room temperature for nearly ten years. After 85,000 hours, samples were again tested with the same laboratory setup in order to examine the influence of the long-term room-temperature annealing. Then, a sevenday annealing in a thermal chamber was performed at 100°C. After another round of experiments, a final annealing sequence in a thermal chamber was performed for 168 hours at 150°C.
Electrical characteristics of LM2940CT5 voltage regulators were obtained through examination of maximum output current and minimum dropout voltage (at two operating points: output currents of 100 and 400 mA). The maximum output current was detected for an in-put voltage of 8 V DC, when output voltage declined to 4.7 V DC [12,13]. Minimum dropout voltage (for I OUT = 100 mA) was determined for a constant output current and the output voltage of 4.9 V [12,15]. For the second operation point, when I OUT was 400 mA, most of the performed measurement output voltages did not reach 4.9 V. Accordingly, results were recorded for the maximum available output voltage [16].
More details about the experimental procedures, dosimetry and radiation sources may be found in the literature [12-17, 25, 26].

Computer simulation
Previous research demonstrated myriad possibilities for the use of the open-source SPICE simulation tools for examination of radiation effects in bipolar integrated circuits [27][28][29]. Thus, a detailed computer simulation model was created with LTspice IV software [30], according to the schematic circuit diagram published in the manufacturer's data sheet [23]. The focus in the simulation model was on analysis of radiation and post-irradiation power transistor responses, i.e., serial and driver transistors. For every predefined absorbed ionising dose and period of annealing, forward emitter current gain, knee current and emitter ballasting resistance were changed for both serial and driver transistors.
Since the filter capacitor of the power source had a low value (nominally 330 μF [14,17]), there was a large AC component of the input voltage. Due to the influence of parasitic capacitances and inductances of the power supply cables (10 m long), as well as the inevitable difference between the simulation model and the real integrated circuit, it was not sufficient to simply transfer measured filter capacitance to the LTspice model. Thus, in order to establish a faithful simulation model, the filter capacitor value was adjusted until the AC component of the input voltage measured during the experiment and the voltage obtained by simulation matched exactly for all the examined cases (this value was 440 μF for all the tested LM2940CT5 circuits).
Simulation of the maximum output current proceeded when the adequate filter capacitor was determined.
Output current, as well as input and output voltages in the simulation model had to be approximately the same as in every particular point of the experiment. Serial and driver transistors had the same values for the forward emitter current gain, but different values for knee current and emitter resistance. Since the serial transistor had five times more elementary PNP transistors than the driver transistor, the driver transistor knee current was five times lower, whilst its emitter resist-ance was five times greater than for the serial transistor. In order to obtain an exact match between experimental and simulation results on the maximum output current (approximately , the values of the emitter resistance were precisely determined, with the accuracy in the range of 0.1 mΩ. When these three parameters were successfully selected (forward emitter current gain (β F ), knee current (I KF ) and emitter resistance (R E12 )) and simulation of the maximum output current experiment was evaluated as acceptable, simulations then determined the minimum dropout voltage. The same schematic circuit diagram had been used for two further simulations, regarding the dropout voltage with constant output currents, being 400 mA and 100 mA. If there were unacceptable disagreement in these two models with experimental results, simulation of the maximum output current was repeated, and β F12 , I KF12 and R E12 were determined again.
Only when simulations of all three types of experiments were estimated to be satisfactory, parameters of the serial and driver transistors were accepted as true values that enabled successful modelling of γ-radiation and post-irradiation effects at all the measurement points, for all absorbed total doses and types of annealing. The above procedure was performed for all predefined control points for both irradiation and post-irradiation periods. Thus, according to the implemented simulation models, β(I c ) characteristics were generated for all four bias and load conditions for the serial power transistor.

Results
The results that unify examination of the maximum output current and minimum dropout voltage, recorded in LM2940CT5 voltage regulators, are summarised in Table 1. Previously published results were complemented by the new experimental results on post-irradiation effects. Since the internal consumption currents, i.e., the voltage regulator no-load quiescent currents (I Q0 ), were in all cases approximately the same, only the values, procured during examination of the maximum output current, are presented in Table 1. In order to obtain a complete review of the LM2940CT5 voltage regulators, the basic parameters of the serial and driver transistors, obtained by computer simulations, are included in Table 1.
As seen in Table 1, dropout voltage varied modestly, both during the irradiation and annealing. On the other hand, maximum output current variations were more substantial. Nevertheless, output voltage values decreased below the minimum acceptable value of 4.9 V while operating with a load current of 400 mA. There- Table 1: Absolute values of input voltage (V IN ) and output voltage (V OUT ), procured during the experiment for determination of the serial transistor's minimum dropout voltage (V EC12 ; tests with load current of 100 mA and 400 mA), as well as output current (I OUT ) and no-load quiescent current (I Q0 ), procured during maximum output current (I MAX ) examination. Also the accompanying data on the serial transistor's excess base current (ΔI B12 ) in the LM2940CT5 National Semiconductor ® voltage regulator were enclosed, being a consequence of the exposure to the ionising radiation. Experimental results were extended with parameters of the serial and driver transistors (maximum forward emitter current gain (β Fmax ), knee current (I KF ) and emitter resistance (R E )), defined in the LTspice simulation models. Successive periods of annealing are marked as follows: Ann.1: the first period of annealing (Θ a = 20°C, t = 85,000 hours); Ann.2: the second period of annealing (Θ a = 100°C, t = 168 hours); Ann.3: the third period of annealing (Θ a = 150°C, t = 168 hours). Experimental values of I MAX , V IN , V OUT and I Q0 , procured during the irradiation of LM2940CT5 voltage regulators, for total doses up to 500 Gy(SiO 2 ), were used from references [13], [15] and [16]. Taking into account data on the circuits, biased and heavily loaded during irradiation, the LM2940CT5 voltage regulator was acceptably radiation tolerant; its output voltage was maintained near the threshold of 4.9 V, while its characteristics sharply degraded only after removal from the radiation environment! There was also an unusual response of the excess base current (ΔI B ) during examination of the maximum output current. Excluding the heavily loaded circuits during irradiation, all other samples demonstrated negative values for the excess base current! Usually, in the radiation environment, base current increases as a consequence of ionising radiation exposure and then decreases during annealing. Such a response was indeed recorded during minimum dropout voltage examination (see Table 1), but the completely opposite response was recorded when voltage regulators were examined with the maximum output current.
In order to provide answers to these, seemingly contradictory results, a detailed computer simulation model was developed.

Computer simulation
Detailed schematic circuit diagram that unified the experimental setup and LM2940CT5 voltage regulator internal structure is presented in Fig. 1, while a simplified version of the same test circuit was presented in Fig. 2. As a basis for development of the LTspice model of power transistors, the model of the discrete D45H11 PNP power transistor was used [31,32]. This component is a 10 A power transistor with the following electrical characteristics: forward emitter current gain β F = 40-60, emitter-collector breakdown voltage BV EC0 = 80 V and transition frequency (or gain-bandwidth product) f T = 40 MHz [32].  In order to obtain a faithful model of the implemented LM2940CT5 circuit PNP power transistor, additional resistors, R E12 and R E2 (see figures 1 and 2), were added to the serial and driver PNP power transistor emitters. The emitter resistance value of the power transistor in its LTspice model was kept at a constant value, while only external emitter resistance was changed, a feature that simulated radiation and post-irradiation effects in the emitter area of power transistors. SPICE parameters of the power transistors, the serial, Q 12 and the driver one, Q 2 (see Fig. 1), are presented in Table 2. Most of the parameters from the original D45H11 model were not changed, but parameters related to the base resistance (Rb and Rbm) were increased twofold in order to obtain a faithful simulation of the Q 12 power transistor response. Meaning of parameters, specified in Table 2, is given in the SPICE manual [33].
At first, a possibility was considered for significant influence of the operational amplifier output stage, supplying the driver transistor, as previously described in the literature [28]. Thus, possible influence of the output stage transistor (Q32 in Fig. 1) was evaluated on the perceived reduction of the maximum output current in LM2940CT5 voltage regulator. As in the case of all the other NPN transistors in the voltage regulator control circuit, transistor Q32 was selected as a basic model, having forward emitter current gain β F32 = 100. Influence of γ-radiation on the output stage transistor, Q32, was simulated by reduction of its current gain. None-   Table 1, are emphasized in the plot theless, procured results led to the conclusion that the parameters of the transistor Q32 had negligible effect on the serial transistor's base current and the voltage regulator maximum output current. Even a fivefold reduction of its current gain (down to β F32 = 20) led to only 0.5 % reduction of the serial transistor base current, whilst keeping the voltage regulator maximum output current almost unchanged.
Therefore, according to the previous analysis, as well as the published data [12][13][14][15][16], it was assumed that the elements of the control circuit would have constant values, while the values of two power transistors (serial and driver PNP transistors) were changed for every control point. Comparison of the experimental and simulation data for the base current of the serial PNP power transistor, I B12 , are presented in figures 3 -6. Used parameters of the serial and driver transistors, for every predetermined irradiation and annealing point, are presented in Table 1. Successive periods of annealing are marked in the same way as in the capture of Table 1.
Thus, the data presented in Table 1 and figures 3 -6 indicate the relatively small influence of radiation and post-irradiation effects on the serial power transistor knee current, a much greater effect on its forward emitter current gain and, finally, a substantial influence on emitter resistance. This last parameter crucially affected the radiation hardness of the serial power transistor and, consequently, the radiation response of the LM2940CT5 voltage regulator.
In general, for increased total ionising dose, the current gain of power transistor declined, knee current increased and, usually, emitter resistance increased.   When knee current was too low, for simulation of the maximum output current, base current of the serial transistor was too large. If a current gain would be too high, a base current (for minimum dropout voltage with output current of 100 mA) would be too low, in comparison with experimental values. If emitter resistance would not match exactly with the filter capacitor, the input (≈ 8 V DC) and output voltage (≈ 4.7 V DC), obtained experimentally, could not match the simulation results when the maximum output current was ex-amined. Therefore, using a procedure of trial and errors, acceptably good combination of the serial power transistor parameters β F12 , I KF12 and R E12 have been achieved.
Criterium for the acceptable deviation of simulation results from the experimental ones was mainly defined as a compromise between overshoot of the simulated base current, obtained during examination of the minimum dropout voltage (for I OUT = 400 mA), and undershoot of the same simulated value, procured whilst maximum output current was determined. Thus, the parameters of the serial lateral PNP transistor were changed until a balance was achieved between deviation of base currents (I B12 ), procured during an experiment and simulation. An effort was made to keep the deviation between experimental and simulation results of base currents up to 10 -15 %. Only in several extreme points (see, for instance, Fig. 3: D = 500 Gy (SiO 2 )) this range was exceeded, when the deviation reached, at most, 30 %.
At last, when simulations of all the experiments were finished, for all the total doses and annealing sequences, new simulations had been made. These characteristics, presented in Fig. 7, were produced for serial transistor collector currents, which ranged from 1 -400 mA, and for a constant emitter-collector voltage of 3.3 V.
Since the maximum output current for samples of unbiased voltage regulators in many cases declined below 400 mA, simulation results for 300 mA were also included.

Radiation effects
Bias conditions implemented during irradiation primarily affected variations of the serial transistor's emit-ter resistance, R E12 . On the other hand, bias condition influences were less apparent on variations of the forward emitter current gain and knee current, since these measures were primarily affected by the absorbed total ionising radiation dose. Deposition of the total 500 Gy dose in all cases decreased forward emitter current gain by 54 -62 %. The knee current was more sensitive to the bias conditions, since it increased by 20 -80 %. Nevertheless, emitter resistance variations exhibited a wide range of behaviour; they sharply increased when the circuit did not operate with high load current during the irradiation and steadily decreased when integrated circuits were biased and heavily loaded during gamma-radiation exposure. β F (I C12 ) characteristics were generated for I C12 collector currents between 1 -400 mA (Fig. 7). Simulation results revealed that, simultaneously, collector current of Q 2 driver transistor changed only from 1.6 mA up to 12 mA. For the specified range of collector currents of the serial power transistor, and taking into account all the control points, the computer simulation provided emitter-base voltage values (V EB12 ) between 355 and 691 mV.
The marked differences between the emitter resistance variations, recorded for various bias conditions, demonstrate different dominant mechanisms of the charge buildup in oxides and interfaces of irradiated integrated circuits. Based on the data presented in Table 1 and figures 3 -6, one can conclude that the serial power PNP transistor emitter area was, for the first three cases, primarily affected by the initial buildup of the oxide trapped charge following the absorption of 50 Gy radiation. This initial absorbed dose significantly decreased the maximum output current and, consequently, the entire voltage regulator radiation tolerance. Nevertheless, this phenomenon did not occur for the samples that were heavily loaded during irradiation. In these circuits, emitter resistance steadily decreased as the absorbed dose increased, and declined nearly ninefold after 500 Gy radiation absorption. At the same time, the serial transistor forward emitter current gain decreased by 60 %. Data on the maximum output current and minimum dropout voltage (for total ionising dose of 500 Gy) revealed that the overall performance of heavily loaded voltage regulators slightly improved (see Table 1). This result suggests that the voltage regulator radiation tolerance was more affected by the positive influence of the serial transistor emitter resistance decline than by the negative influence of the serial transistor current gain reduction.
It is important to define the reason for the maximum current improvement of the samples heavily loaded during irradiation. As previously mentioned, high load current may significantly increase chip temperature and thus lead to oxide-trapped charge annealing. Nev- ertheless, this factor is connected with the total power dissipation and, consequently, to the emitter-collector dropout voltage. Since the input voltage was 8 V during irradiation, the dropout voltage was nearly 3 V. Taking into account an output current of 0.5 A, power dissipation was 1.5 W. The total thermal resistivity of the LM2940CT5 voltage regulator is approximately 18 K/W (thermal resistivities of the implemented heatsink and junction-case structure of the TO-220 package were, respectively, 14 K/W [14] and 4 K/W [23]), as well as an ambient temperature of 20°C, there could be a theoretical chip temperature rise of up to 47°C. Nevertheless, this value is low for any expressed annealing of the oxide-trapped charge, since the oxide-trapped charge significantly anneals only when temperatures exceed 75-100°C [34], and interface traps at even higher temperatures, up to 250°C [7].
In previous research, a detailed discussion was dedicated to analysis of the influence of the trapped charge type on the LM2940CT5 voltage regulator radiation re-sponse [16]. Taking into account that, above the base and emitter areas of the lateral power PNP transistor was highly contaminated isolation oxide, with an approximate thickness d ox = 500 nm [12], it was assumed that the oxide trapped charge would primarily affect this integrated circuit radiation response, while the interface trap concentrations would have secondary importance [16]. The primary reason for this supposition was the expectation that the concentration of the charge trapped in the oxide would be very high, with a proportion of N ot ~ d ox 2 [34,35] or even N ot ~ d ox 3 [34]. Nevertheless, a more recent publication revealed that in thick oxides, at room temperature and at low electric fields, charge yield would be relatively low, since most of the oxide bulk would not influence the total concentration of the oxide trapped charge [36]. Accordingly, in most real applications, in thick isolation oxides of bipolar integrated circuits, the concentration of the oxide trapped charge would not be proportional to the square of the oxide thickness, but rather much weaker dependence than N ot ~ d ox 2 , primarily observed in thin Data were obtained from computer simulation models of the irradiated and annealed voltage regulators, which demonstrated high agreement with the experimental results presented in Table 1 and figures 3 -6.
gate oxides of metal-oxide-semiconductor (MOS) devices [35]. Thus, in most practical cases, the influence of the interface trap concentrations (N it ) would be of primary importance to bipolar integrated circuit radiation response.
Therefore, it may be assumed that high current flow in the LM2940CT5 voltage regulator primarily passivated switching states, i.e., traps at the interface silicon-oxide and at the accompanying border oxide region, which lead to voltage regulator recovery from gamma-radiation influence. This proposition is much more plausible than the influence of high current on the oxide-trapped charge itself, either due to chip temperature increase or the high-current-density effect on the oxide below the wide emitter's metal contacts [16]. Large emitter resistivity variations in virgin, unirradiated devices indicate a defect build-up even in the fabrication phase of integrated circuits that would consequently decrease the voltage regulator's maximum output current (as have been seen in [12]).
The developed LTspice simulation model and obtained electrical characteristics β(I C12 ), as well as the previously presented line regulation characteristics [16], mutually show the primary cause of the LM2940CT5 voltage regulator low radiation tolerance was primarily related with high emitter resistance of the serial PNP power transistor Q 12 .

Post-irradiation effects
As mentioned earlier, three annealing sequences were selected to analyse the dominant influence of various kinds of trapped charge on the radiation response of the LM2940CT5 voltage regulator. It would be expected that long-term, room temperature annealing should allow partial recovery of the oxide-trapped charge with further build-up of interface traps [25,37]. Then, oneweek 100°C annealing should allow recovery of most of the remaining oxide-trapped charge without seriously affecting the interface traps [17,23]. Finally, 168-hour, 150°C annealing should remove most residual interface traps while simultaneously eliminating all remaining oxide trapped charge [17,22]. Thus, such an approach enables a rough estimation of the influence of bias and load conditions on charge trapping in the LM2940CT5 voltage regulator.
Data from Table 1 and Fig. 7 indicate great variation in the post-irradiation response of the various voltage regulator samples. Current-gain characteristics of the serial power transistor, β(I C12 ), are good foundations for analysis of these circuit responses. The first conclusion is that post-irradiation effects related to the serial transistor's forward emitter current gain and knee current, on the one hand, and the emitter resistance, on the other, showed no correlation; both demonstrated variations in separate ways. Heavily loaded voltage regulators demonstrated slight degradation of the serial transistor current gain during the ten-year room-temperature annealing, while moderately loaded circuits showed slight recovery. However, in both mentioned cases emitter resistance increased (sevenfold for the heavily loaded circuits). At the same time, negligibly loaded circuits (I OUT = 1 mA) seemingly remained unaffected by the room-temperature annealing sequence, both from the perspective of current gain and emitter resistance. Finally, unbiased samples demonstrated great recovery of the serial transistor's current gain, followed by significant reduction in emitter resistance. Thus, a conclusion may be drawn that during radiation exposure the unloaded circuits were heavily affected by the oxide-trapped charge. Biased and negligibly loaded samples were seemingly unaffected by the oxide trapped charge, and, consequently, ten-year buildup of the interface traps. Room-temperature annealing apparently caused more substantial degradation to the voltage regulator operated with higher load current during radiation exposure. In this case, it may be assumed that the interface states buildup resulted in the marked emitter resistance increase.
The next step was one-week, 100°C annealing. Except in the case of unloaded voltage regulators, this test marginally affected the serial transistor's forward emitter current gain, while, for all biased samples, emitter resistance increased (most prominently in the heavily loaded devices). This test was intended primarily to remove the oxide-trapped charge. Thus, the obtained results (Table 1 and Fig. 7) supported the previous conclusion that, in all the voltage regulators, biased during irradiation, serial transistors were, in comparison with the influence of interface traps, marginally affected by the influence of the oxide trapped charge.
Finally, the third annealing procedure was 168-hour, 150°C exposure of irradiated samples in a thermal chamber. Such an annealing procedure, designed for the removal of most interface traps, led to the recovery of the serial transistor current gain in all of the examined circuits. The most prominent was the forward emitter current gain recovery in biased, negligibly loaded voltage regulators. Further, emitter resistance declined or remained the same in all cases. Nevertheless, all the examined circuits were far from complete recovery from the ionising radiation influence, since the serial transistor current gain remained approximately 60 % of its preirradiation value. Yet, there was a very interesting result regarding the serial transistor emitter resistance, R E12 . Despite great initial variations obtained by simulations from the experimental results (see Table 1), at the end of the third annealing sequence, emitter resistances for all serial transistors, regardless of the bias conditions of irradiated voltage regulators, were nearly the same! The maximum values of the output voltage, obtained during the examination of the minimum dropout voltage (with a constant output current of 400 mA) were also nearly the same (V OUT = 4.724 -4.765 V; Table 1). Thus, at the end of the high-temperature annealing process, it may be assumed that only interface traps remained in the LM2940CT5 voltage regulator, and they heavily affected the serial transistor emitter resistance and forward emitter current gain.

Conclusion
The COTS LM2940CT5 voltage regulator was examined in a gamma-radiation environment, where it was exposed to up to 500 Gy radiation, followed by analysis of its performance in various annealing procedures. In order to analyse these radiation and post-irradiation effects, a detailed LTspice simulation model of this integrated circuit was developed.
Implementation of the simulation model clearly identified the serial power transistor, comprised of 350 elementary lateral PNP transistors, as the weakest part of the entire integrated circuit. Radiation effects in small signal transistors, as well as in the driver PNP power transistor, did not significantly affect the LM2940CT5 voltage regulator's radiation tolerance. On the other hand, primarily the increase of the serial transistor emitter resistance, followed by the decrease of its forward emitter current gain, disqualifies this circuit for use in a radiation environment.
This integrated circuit demonstrated great influence from bias and load conditions on its radiation tolerance. With the exception of samples that operated with a high load current during irradiation, all the other circuits demonstrated a significantly increased serial PNP power transistor emitter resistance even after initial irradiation (50 Gy total dose). On the other hand, operation with high load current during irradiation led to a multifold reduction in emitter resistance concomitant with an increase in the voltage regulator's maximum output current, regardless of the simultaneous significant reduction of the forward emitter current gain. As expected, serial transistors of unbiased and unloaded voltage regulators exhibited the greatest degradation in the ionising radiation environment; both forward emitter current gain and emitter resistance were affected.
In most of the examined cases, three annealing sequences further degraded emitter resistance. There was significant recovery of forward emitter current gain observed in all the irradiated LM2940CT5 voltage regulators. Serial transistors of unbiased and unloaded circuits demonstrated the most prominent recovery during the 10-year room-temperature annealing. Oneweek, 100°C annealing led to significant recovery only of the unbiased circuits. Finally, one week, 150°C annealing sequence led to significant recovery of the forward emitter current gain of serial lateral PNP power transistors in all the examined integrated circuits. This final annealing procedure unified emitter resistance in all of the analysed circuits, regardless of their initial values or bias conditions during operation in a gammaradiation environment.

Acknowledgement
This work was supported by the Ministry of Education, Science and Technological Development of the Republic of Serbia under the project 171007, "Physical and functional effects of the interaction of radiation with electrical and biological systems".