Novel Dual Mode Multifunction Filter Employing Highly Versatile VD-DXCC

In this research a new highly versatile analog building block (ABB), the voltage differencing dual X current conveyor (VDDXCC), is proposed. It is employed to synthesize a versatile dual mode biquadratic filter. The proposed filter uses canonical number of passive elements and has inbuilt tunability feature. In addition, the proposed filter can work as multi input single output (MISO) and single input multi output (SIMO) filter in current mode (CM) of operation. Furthermore, the quality factor and pole frequency of the filter can be set independently. The non-ideal gain analysis and sensitivity analysis of the filters is also carried out to study the effect of process variations and process spread on the filter response. The proposed designs are validated using 0.18um Silterra Malaysia process design kit (PDK) in Cadence Virtuoso design software. The parasitic extraction is carried out using Calibre tool from Mentor Graphics. The complete layout of the VD-DXCC is made and post layout simulation results are given for each design. The post layout results are in close agreement with the theoretical analysis.


Introduction
Analog circuits play a vital role in all electronic systems. The analog circuits are used for interfacing analog world with the digital systems or as standalone high speed signal conditioning systems. The analog signal processing (ASP) offers tremendous benefits over digital signal processing (DSP), especially in terms of chip area, power consumption and speed [1]. All naturally occurring signals are analog in nature, in order to process them digitally the signals need to be converted from analog domain to digital domain and back to analog domain after processing. The digital signal processors require the extra analog to digital converter (ADC) and digital to analog converter (DAC) together with interfacing circuits this increases the power and area requirement of digital signal processing. Recently, the current mode analog active blocks are widely utilized by the researchers in designing analog filters due their advantages over voltage mode circuits [2][3]. The most utilized current mode active blocks are the second generation current conveyor (CCII) [1], differential difference current conveyor (DDCC) [2], fully differential current conveyor (FDCCII) [11], current feedback operational amplifier (CFOA) [1], current backward transconductance amplifier (CBTA) [8], current conveyor transconductance amplifier (CCTA) [22], differ-ential voltage current conveyor (DVCCII) [10], voltage differencing current conveyor (VDCCII) [11], differential voltage current conveyor transconductance amplifier (DVCCTA) [15] etc. Each block carries its own advantages in context to the same the authors in this paper propose another versatile ABB namely the voltage differencing dual X current conveyor (VD-DXCC).
Filters are a critical part of any electronics system. They are employed in data acquisition systems, communication equipment, phase shifters, oscillator designs and bio-medical devices etc. [1,19]. Portable and network connected medical devices for real time monitoring and diagnosis of diseases will be vital in detecting diseases for future medical observation system. To develop such a system low power and low noise analog circuits such as amplifiers and filters are required for physiological signal acquisition and signal processing. The filters are also vital parts in bio-medical data acquisition systems like sensors for artificial kidney for blood flow and filtration rate detection etc. The universal filters are most versatile as they can provide low pass (LP), high pass (HP), notch pass (NP), band pass (BP) and all pass (AP) responses from a single configuration. The main attributes that are desirable in any filter structure are (i) tunability (ii) use of minimum number of passive elements (iii) no requirement of matching between passive components (iv) provision of independent tunability of pole frequency and quality factor (v) use of minimum number of active blocks. The Table  1 provides a detailed literature survey of some exemplary MISO filters from the literature. The study points out that most of the designs suffer from one of the following issues (i) excessive use of active blocks and passive components (ii) lack of tunability (iii) requirement of passive component matching (iv) need of inverting input signal for the realization of filter function.
In this research a highly versatile ABB the VD-DXCC is developed and utilized in design of a MISO dual mode universal filter and SIMO CM filter. The proposed circuits utilized one ABB and minimum passive components. The designed circuits are electronically tunable via bias current of the OTA. The proposed circuits are

Voltage differencing dual X current conveyor
The block diagram of VD-DXCC is shown in Figure 1 and the current voltage equations are presented in matrix Equation 1. The VD-DXCC is a two stage ABB. The first stage consists of operational transconductance amplifier (OTA) and second stage is dual X current conveyor (DXCC).
The CMOS implementation of VD-DXCC is presented in Figure 2. The transistors (M25-M36) form the OTA which is the first stage of the VD-DXCC. The output current of the OTA depends on the voltage difference between voltages at terminals P and N. Assuming saturation region operation for all transistors and equal W/L ratio for transistors M25 and M26 the output current ± = W ZC I I of the OTA is given by Equation 2. The ± ZC terminals are high impedance current output terminals.
Where, K i = µC ox W/2L (i=25, 26), W is the effective channel width, L is the effective length of the channel, C ox is the gate oxide capacitance per unit area and µ is the carrier mobility.
The second stage consists of transistors (M1-24). The W terminal is high impedance voltage input terminal, the X p and X N terminals are low impedance current input terminals and the Z P1-2 , Z N1-2 , terminals are high impedance current output terminals.

Layout design
The complete layout of the VD-DXCC is designed using Silterra Malaysia 0.18μm PDK in cadence design suit. The high performance nhp and php MOS transistors are used for the design. To minimize the effect of parasitics the transistors are put as close as possible. Three level of metal layers are used for the interconnections. The complete layout is presented in Figure 3. The layout occupies an area of (55*25.73µm 2 ).

Proposed dual mode universal filter
The proposed dual mode MISO filter is presented in Figure 4. The filter consists of four passive elements and can work in VM and CM without requiring any changes in its topology. Furthermore, the proposed filter with addition of some extra output terminals can function as CM SIMO filter as well. The features of the filter include ability to work in dual modes, no requirement of negative inputs for realization of filter functions, orthogonal control of frequency and quality factor, simultaneous availability of inverting and non-inverting outputs in the VM configuration, availability of current output at high impedance node, no matching between passive elements is required (except in CM MISO configuration) and tunability. The operation of filter in MISO and SIMO configurations is discussed below:

Voltage Mode Operation in MISO Configuration
In this mode of operation, the input currents I 1 to I 4 are set to zero. The input voltage V 1 to V 3 are applied according to Table 2 to realize a given filter response. In the design capacitor C 2 is always grounded which is beneficial for integrated circuit implementation. Structures using grounded capacitors are advantageous with respect to reducing parasitic effects and the chip area, as the floating capacitor has bigger parasitic capacitances and requires larger chip area [31][32]. The output of the filter can be obtained from low impedance X p and X N nodes. This filter provides both inverting and non-inverting output signals which is another striking feature of the design. The filter transfer function and expression for frequency are given in Equations (3-5).

Current Mode Operation in MISO Configuration
In CM operation the input voltages V 1 to V 3 are reduced to zero grounding all the passive elements. The input current I 1 to I 4 are applied according to Table 3 to realize a given filter response. As can be deduced from the filter structure the output current is obtained from high output impedance terminal which is necessary for cascading. The filter requires a simple resistive matching condition for realizing HP, NP and AP responses. The slight drawback is the requirement of double input to realize AP response but given the capability of the filter to work in dual mode this can be accommodated. The transfer function and expression for frequency are given Equation (6-8).

Current Mode Operation in SIMO Configuration
The SIMO filter structure is shown in Figure 5. As can be seen from the figure the filter has same topology as the previously discussed dual mode MISO filter presented in Figure 4. This topology has additional output terminals to provide explicit current output from high impedance nodes. The filter transfer function and expression for pole frequency and quality factor are summarized in Equations 9-13.

Non-ideal gain and sensitivity analysis
In this section the non-idealities of the VD-DXCC are considered and their influence on the proposed filter circuits is analyzed. The frequency dependent non-ideal voltage (β), current (α) and transconductance transfer (γ/γ') gains cause a slight change in the current and voltage signals during transfer leading to undesired response. Considering the effect of frequency dependent current and voltage transfer gains the V-I characteristics of VD-DXCC are modified as given below.  (19) Where α is the current transfer gain, β stands for voltage transfer gain and γ denotes the transconductance transfer gain. Ideally their values should be unity.
The transfer function, pole frequency and quality factor of the MISO filter considering the effect of non-ideal current and voltage gains are given in Equations (20-23).

Simulation results
To validate the proposed designs the VD-DXCC is designed in 0.18μm PDK from Silterra Malaysia. The com- The non-ideal expressions for pole frequency and quality factor of the SIMO filter are presented in Equations (24-25).
The sensitivities of ω o and Q with respect to the nonideal gain and passive elements are given below. The Equations (26)(27)(28) give sensitivities of MISO filter and Equations (29)(30)(31) give sensitivities of SIMO filter. The sensitivities are not more than one which is desired.
plete layout of the VD-DXCC is designed and the post layout results are discussed. The transistors width and length used are presented in Table 4. The circuits are simulated at a supply voltage of V DD = -V SS = 1.25V. The transconductance of OTA is fixed at g m = 903.92µS by selecting bias current of OTA, I B = 100µA. The current and voltage transfer gains are found to be (α=0.976 and β=0.982). The dual mode filter is validated by designing it for a frequency of 2.704 MHz in voltage mode of operation.
The passive elements are selected as R 1 = 4kΩ, R 2 = 4kΩ, C 1 = 20pF, C 2 = 20pF and I Bias = 20uA. The ideal and post layout response of the filter is shown in Figures 6-7.
The simulated pole frequency of the filter is found to be 2.7959 MHz which translates into 3.4% error. To examine the signal processing capability of the filter transient analysis is performed for band pass configuration. A sinusoidal signal of 100mV amplitude and 2.704 MHz frequency is given at the input and the output is noted. It can be deduced from Figure 8 that the filter functions well. The tunability feature of the filter is verified. First, the filtering frequency is varied by changing the bias current of the VD-DXCC as shown in Figure 9. Second, the quality factor is varied by changing the value of the resistor R 2 as presented in Figure 10. It can be seen that the frequency and quality factor of the filter can be independently controlled. The power dissipation of the filter for VM is found to be 2.237mW.
To study the effect of process variation on the proposed filter Monte Carlo analysis is carried out for 10% variation in capacitors (C 1 &C 2 ) values for the AP response.  Figure 16. It can be inferred   Figure 17 which further testifies the accurate signal processing capability of the filter structure.
for BP response. The analysis is done for 200 runs and the results are presented in Figures 18-19. Additionally, Monte Carlo analysis is also done for 10% variation in capacitors (C 1 &C 2 ) values. The results are given in Figure  20. It can be inferred from the analysis results that the filter does not require an passive components matching constraints.

Conclusion
In this research, a newly proposed ABB the VD-DXCC is employed in designing a novel dual mode filter capable of working in MISO (VM, CM) and SIMO (CM) configurations. The developed filter did not require any passive components matching condition (except in SIMO CM configuration) for realizing filter responses. The pole frequency and quality factor of the proposed filter can be tuned independently. The non-ideal and sensitivity analysis are also carried out for the filter circuit to study the effect of the process variations. The post layout simulations are in close agreement with the theoretical analysis.