Analog / Radio-Frequency Performance Analysis of Nanometer Negative Capacitance Fully Depleted Silicon-On-Insulator Transistors

The negative capacitance field-effect transistor can break the limitation of the Boltzmann tyranny. In this study, the analog and radio-frequency (RF) performance of a nanometer negative-capacitance fully depleted silicon-on-insulator (NC-FDSOI) transistor is investigated. The analog/RF parameters of the NC-FDSOI device are compared with the conventional FDSOI counterparts for transconductance, output conductance, gate capacitance, cutoff frequency, and maximum oscillation frequency. In addition, the effect of ferroelectric thickness on the analog/RF performance of NC-FDSOI device is analyzed and discussed. The results show that even when operated at low voltages, NC-FDSOI transistors enable analog/RF performance improvement in traditional FDSOI counterparts at low power in the case of a suitable ferroelectric thickness.


Introduction
In the past decade, complementary metal-oxidesemiconductor (CMOS) transistors have experienced unprecedented development, shrinking device sizes, and advances in integrated device design and fabrication, bringing the CMOS technology into the nanometer era. However, continued miniaturization has also brought about various new constraints, such as high-power consumption caused by chip overheating [1]. To solve these problems, steep switching characteristics and lower operating voltage can be achieved by lowering the sub-threshold slope (SS). NCFETs based on ferroelectric on a gate stack have attracted significant attention in the field of advanced CMOS devices due to their lower SS (<60 mV/decade) [2]- [8]. Recently, NCFETs have proven to be suitable for a variety of low-power applications, such as wearables, bioelectronics, and the Internet of Things [9]- [12]. Furthermore, with the advent of the 5G era in radio-frequency (RF) applications, the analog/RF performance of NCFETs must be tested. FDSOI technology is popular because it better overcomes short channel effects and is significantly less expensive to manufacture than fin field effect transistors (FinFETs). In previous studies, FDSOI transistors showed good analog/RF performance [13,14]. However, the relationship between the negative capacitance effect and analog/RF performance parameters for FDSOI devices is still not understood. Therefore, in this work, we address this deficiency by simulating analog/RF performance of 20-nm NC-FDSOI transistors with different ferroelectric thicknesses (T fe ) utilizing a computer-aided-design (TCAD) tool.

Materials and methods
At present, most negative-capacitance transistors are implemented by adding ferroelectric materials [15]- [20]. There are two main types of structures used in the negative capacitance transistors: metal-ferroelectricmetal insulator-semiconductor (MFMIS) and metalferroelectric insulator-semiconductor (MFIS). Owing to the better performance of the MFMIS NCFET in terms of it being hysteresis-free [21], a NCFET with MFMIS struc-ture is used in this work. Then, the TCAD tool is used to add a ferroelectric capacitor to the gate on the underlying conventional FDSOI to form an NC-FDSOI transistor. The structure of the FDSOI and NC-FDSOI transistor are shown in Fig. 1.The gate of NC-FDSOI used an HfO2 based ferroelectric with coercive field, Ec = 1 MV/cm and remnant polarization, Pr = 5 μC/cm2. For better compatibility with the CMOS process [22], a smaller ferroelectric thickness is chosen (T fe = 1, 2, 3, and 4 nm).
The device parameters used for numerical simulation are summarized in Table 1.The TCAD mixed-mode device simulator is used to simulate the NC-FDSOI and FDSOI transistors [23], and the frequency characteristics of the NCFDSOI and FDSOI are discussed by AC small-signal analysis. The simulation uses a variety of physical models, such as Fermi statistics, dopingdependent mobility, high-field saturation, mobility degradation at interfaces, Shockley-Read-Hall recombination, and density-gradient quantization. The Poisson and Landau-Khalatnikov equations are solved selfconsistently by the TCAD tool [24,25]. The LK equation, which relates the polarization (P) and electric field (E), is given in Eq. (1) [26,27]: where α, β, γ, and ρ are ferroelectric material parameters and P is the polarization strength. In this work, RF performance parameters are extracted from the twoport network.  It can be seen that the current of the NC-FDSOI is always greater than that of the FDSOI, and the SS is lower, whether it is working in a linear or saturated region. The results show that the current-amplifi- Figure. 1: FDSOI and NC-FDSOI device structure. cation capability of the NC-FDOI is significantly stronger than that of the conventional FDSOI (~60% addition, T fe =3 nm) at V ds =0.7 V. When the thickness of the ferro-electric (T fe ) of the NC-FDSOI is set to 6 nm, SS=43 mV/ decade breaks the limit of the SS for the transistor at room temperature, where SS is extracted from Eq. (2):

Results and discussion
As the SS decreases, the ratio of on-and off-state currents (I on /I off ) increases compared to the FDSOI, which indicates that the NC-FDSOI is more suitable for highspeed switching applications than the conventional FDSOI. Experiments under actual environmental measurements also show that NC-FDOSI has good current amplification capability and low SS, which the SS is reduced from 78 mV/decade to 73 mV/decade, and the drain current is increased from 4 μA to 7 μA [28].  (d), the ferroelectric has an enhanced effect on the output characteristics of the device, whether at high or low V gs . However, at low V gs , the internal gate voltage (V in ) is lowered due to the influence of the ferroelectric, and the negative differential resistance (NDR) effect is generated [29].  Fig. 3(a) shows transconductance (g m ) with V gs at V ds = 0.7 V and the output conductance (g ds ) as a function of V ds fixed at V gs = 0.7 V, where g m determines the device's gain. The g m and g ds values for both the devices are obtained by Eqs. (3) and (4), respectively: It can be clearly seen from Fig. 3(a) and (b) that the g m and g ds values of the NC-FDSOI are much larger than those of the FDSOI device, and the g m and g ds values of the NC-FDSOI are further increased as the thickness of the ferroelectric increases. As the current gain decreases, g m will gradually decrease after reaching the peak, but overall it will be larger than that of the FDSOI. This indicates that the NC-FDSOI transistor gain increases as T fe increases within a certain range due to the negativecapacitance effect. The high transconductance makes the NC-FDSOI suitable for high-gain amplifier applications. Fig. 4(a) and (b) shows the total gate capacitance (C gg ) and ferroelectric capacitance (C fe ) of the NC-FDSOI with V gs at different ferroelectric thicknesses (T fe = 1, 2, 3, and 4 nm). Simply lowering the threshold voltage (V th ) and lowering SS is not enough to improve circuit performance. The important device parameters that affect performance specifications, such as power dissipation and intrinsic delay, are the total gate capacitance [30]. Therefore, it is necessary to analyze the impact of the ferroelectric thickness in the gate stack on C gg . As shown in Fig. 4(a), as the thickness of the ferroelectric increases, the gate capacitance increases compared with the FDSOI total capacitance (C mos ). As shown in Fig. 4(b), this is mainly due to the decrease in the absolute value of the ferroelectric capacitance (C fe ). Fig. 4(c) shows the variation of C gg with frequency at V gs = 0.4 and 0.7 V. In Fig. 4(c), C gg begins to decrease after ap-proximately100 GHz, and the C gg of NC-FDSOI is larger at V gs =0.4 V. This result is consistent with that shown in Fig. 4(a).
In Fig. 5(a) and (b), the cutoff frequency (f T ) and maximum oscillation frequency (f max ) with V gs at V ds = 0.7 V, where f T is extracted from current gain (h21) through an extrapolation of a 20-dB/decade slope, and f max is extracted from Mason's unilateral gain through an extrapolation of a 20-dB/decade slope. It can be seen from Fig. 5(a) that the maximum f T of the NC-FDSOI is the same as that of the conventional FDSOI. However, with the increase of V gs , the NC-FDSOI leads to f T achieving peaks at lower V gs due to the increase of ferroelectric thicknesses compared to the baseline FDSOI (T fe = 0) [26]. As is known from Eq. (5), this is because both g m and C gg peak at a lower V gs , which is caused by a decrease in V th as Tfe increases [31]. It can be seen from Eq. (6) that f max is mainly affected by f T and gate resistance (R g ), so f max in Fig. 5(b) is the same as the f T trend and peaks at a lower gate voltage. Under the influence of g m reduction, f T and f max gradually decrease after reaching the peak value and are lower than that of the FDSOI at high gate voltage, and the RF performance of the circuit will deteriorate at high gate voltage. Therefore, the NC-FDSOI performs better at low bias voltages:

Conclusions
In this work, a comparison of analog/RF performance between NC-FDSOI and FDSOI transistors is demonstrated, and the effects of ferroelectric thickness on the analog/RF parameters of the NC-FDSOI are analyzed. The f max was measured for the first time, and through a one-to-one comparison with FDSOI, the high frequency dependence of the C gg and the V ds dependence of the g ds were achieved for the first time.The results show that the NC-FDSOI is superior to the conventional FD-SOI in terms of SS, g m , and g ds , and the effect is more significant with the increasing thickness of the ferroelectric. After the addition of the ferroelectric negative capacitance, the f T and f max values of the NC-FDSOI also peak at a low bias voltage. Therefore, in the case of a suitable T fe , the NC-FDSOI can not only outperform the conventional FDSOI in terms of digital circuits but also achieve better analog/RF performance compared to the FDSOI with reduced power consumption.In the future we will also study the effects of different ferroelectric parameters on analog/RF performance.

Gate Voltage V gs (V)
T fe =1 nm T fe =2 nm T fe =3 nm T fe =4 nm