Small Signal Modeling of Scaled Double-Gate MOSFET for GHz Applications

Himangi Sood, VIRANJAY M. SRIVASTAVA, Ghanshyam Singh

Abstract


The limits on scaling suggests the technology advancement for the solid-state devices. However, the double-gate MOSFET has emerged as an alternative device structure due to the certain significant advantages, i.e. increase in mobility, ideal sub-threshold slope, higher drain current, reduced power consumption and screening of source end of the channel by drain electric field due to proximity to the channel of the second gate, which reduces the short channel effects. In this work, we have analyzed the double-gate MOSFET considering the undoped body because the doping drastically varies the threshold voltage. The analytical expressions are derived based on the surface potential model which are further used to yield the potential distribution, drain current, conductance and trans-capacitance that illustrate the volume inversion effect is quite significant in this device upto the certain range of dimensions. In addition to this, we have analyzed the performance of the symmetric DG MOSFET based on the circuit design prospective using S-parameters

Keywords


Short channel effect; Double-gate MOSFET; S-parameters; RF devices; Microelectronics; VLSI

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