Design and Efficiency Enhancement of Polar Encoder Based on Universal Logic Gates Utilizing QCA Technology

Abstract

Nano-scale circuit designs can be implemented using a transistor-free method called Quantum-dot Cellular Automata (QCA). QCA circuits are denser, quicker, and need less energy than the commonly used transistor-based technologies. In QCA technology, like in many other technologies, it is crucial to send and receive information securely. The QCA-based polar encoder circuit is one of the circuits that makes this possible. In QCA technology, there are some shortcomings for the polar encoders circuit, and the need for strong designs with high speed and low cell count is strongly felt. Consequently, three novel and extensively used circuits for QCA-based polar encoders are proposed in this study. With only 16 cells and a 0.02 μm² total area, the G2 (2-bit) design is a single-layer structure with a 0.5 clock cycle delay. The suggested G4 (4-bit) design has 121 cells and requires a total size of 0.16 μm² with a delay of 1.50 clock cycles. Furthermore, the G8 (8-bit)  design has a delay of 3.5 clock cycles and a total size of 0.8 μm² with 564 cells. All the designs are simulated with the QCADesigner. The results of the tests and simulations show the superiority of the presented circuits compared to the best previous circuits in terms of speed, number of cells, and space used for implementation.